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en:sdrx [2013/07/26 10:11] – [Ideas for improvements] fluktuaciaen:sdrx [2013/07/26 10:16] – [UHF SDR SDRX02A receiver] fluktuacia
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 Adding more modules to the arrangement could create a complete set where the receiver would be independent on a computer. Its realisation has several variants: Adding more modules to the arrangement could create a complete set where the receiver would be independent on a computer. Its realisation has several variants:
  
-  * The receiver with a tunable oscillator and module with LDC that would show the tuned frequency. The buttons below the LCD would allow the retuning of the receiving frequency. +  * The receiver with a tunable oscillator and module with LDC that would show the tuned frequency. The buttons below the LCD would allow the retuning of the receiving frequency. 
-  * A second variant would be the same as the first one, with an exception of digitising the analog output, that would be transmitted through some kind of a common interface to a computer (USB, ThunderBolt, Ethernet, ...). The same interface could be used for LO tuning as well.+  * A second variant would be the same as the first one, with an exception of digitizing the analog output, that would be transmitted through some kind of a common interface to a computer (USB, ThunderBolt, Ethernet, ...). The same interface could be used for LO tuning as well.
  
  
 ====== UHF SDR SDRX02A receiver ====== ====== UHF SDR SDRX02A receiver ======
  
-**The design of the receiver described below is still only in preliminary stage of development**+**The design of the receiver described below is still only in preliminary stage of development**
  
-The design should probably be even more modular. That includes separate VGA input amplifier, input band-pass filter, I/Q demodulator with input band-pass filter. +The design should probably be even more modular. That includes separate VGA input amplifier, an input band-pass filter, an I/Q demodulator with an input band-pass filter. 
-ACD with parallel anti-alias filter and FPGA with parallel USB interface. +ACD with parallel anti-alias filter and FPGA with parallel USB interface. 
  
  
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 **The design of the receiver described below is still only in preliminary stage of development** **The design of the receiver described below is still only in preliminary stage of development**
  
-The design should include separate input amplifier (VGA), input band-pass filter to limit the possible intermodulation, I/Q demodulator with input band-pass filter. +The design should include separate input amplifier (VGA), an input band-pass filter to limit the possible intermodulation, an I/Q demodulator with an input band-pass filter. 
-Analog Frond End ADC with input anti-alias filter and FPGA with PCIe interface for connection to the thunderbolt module.+Analog Frond End ADC with input an anti-alias filter and FPGA with PCIe interface for connection to the thunderbolt module.
  
  
en/sdrx.txt · Last modified: 2013/12/07 11:20 (external edit)