en:sdrx
Differences
This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
en:sdrx [2013/07/26 10:13] – [An independent receiver] fluktuacia | en:sdrx [Unknown date] (current) – external edit (Unknown date) 127.0.0.1 | ||
---|---|---|---|
Line 169: | Line 169: | ||
* [[http:// | * [[http:// | ||
* [[http:// | * [[http:// | ||
+ | * [[https:// | ||
Line 349: | Line 350: | ||
====== UHF SDR SDRX02A receiver ====== | ====== UHF SDR SDRX02A receiver ====== | ||
- | **The design of the receiver described below is still only in preliminary stage of development** | + | **The design of the receiver described below is still only in a preliminary stage of development** |
- | The design should probably be even more modular. That includes separate VGA input amplifier, input band-pass filter, I/Q demodulator with input band-pass filter. | + | The design should probably be even more modular. That includes |
- | ACD with parallel anti-alias filter and FPGA with parallel USB interface. | + | ACD with a parallel anti-alias filter and FPGA with a parallel USB interface. |
Line 373: | Line 374: | ||
**The design of the receiver described below is still only in preliminary stage of development** | **The design of the receiver described below is still only in preliminary stage of development** | ||
- | The design should include separate input amplifier (VGA), input band-pass filter to limit the possible intermodulation, | + | The design should include |
- | Analog Frond End ADC with input anti-alias filter and FPGA with PCIe interface for connection to the thunderbolt module. | + | Analog Frond End ADC with input an anti-alias filter and FPGA with a PCIe interface for connection to the thunderbolt module. |
en/sdrx.txt · Last modified: 2013/12/07 11:20 (external edit)