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en:sdrx [2013/07/26 10:15] – [UHF SDR SDRX02A receiver] fluktuaciaen:sdrx [2013/07/26 10:16] – [UHF SDR SDRX02B with high bandwidth] fluktuacia
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 **The design of the receiver described below is still only in preliminary stage of development** **The design of the receiver described below is still only in preliminary stage of development**
  
-The design should include separate input amplifier (VGA), input band-pass filter to limit the possible intermodulation, I/Q demodulator with input band-pass filter. +The design should include separate input amplifier (VGA), an input band-pass filter to limit the possible intermodulation, an I/Q demodulator with an input band-pass filter. 
-Analog Frond End ADC with input anti-alias filter and FPGA with PCIe interface for connection to the thunderbolt module.+Analog Frond End ADC with input an anti-alias filter and FPGA with PCIe interface for connection to the thunderbolt module.
  
  
en/sdrx.txt · Last modified: 2013/12/07 11:20 (external edit)