en:sdrx
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Adding more modules to the arrangement could create a complete set where the receiver would be independent on a computer. Its realisation has several variants: | Adding more modules to the arrangement could create a complete set where the receiver would be independent on a computer. Its realisation has several variants: | ||
- | * The receiver with a tunable oscillator and module with LDC that would show the tuned frequency. The buttons below the LCD would allow the retuning of the receiving frequency. | + | * The receiver with a tunable oscillator and a module with LDC that would show the tuned frequency. The buttons below the LCD would allow the retuning of the receiving frequency. |
- | * A second variant would be the same as the first one, with an exception of digitising | + | * A second variant would be the same as the first one, with an exception of digitizing |
====== UHF SDR SDRX02A receiver ====== | ====== UHF SDR SDRX02A receiver ====== | ||
- | **The design of the receiver described below is still only in preliminary stage of development** | + | **The design of the receiver described below is still only in a preliminary stage of development** |
- | The design should probably be even more modular. That includes separate VGA input amplifier, input band-pass filter, I/Q demodulator with input band-pass filter. | + | The design should probably be even more modular. That includes |
- | ACD with parallel anti-alias filter and FPGA with parallel USB interface. | + | ACD with a parallel anti-alias filter and FPGA with a parallel USB interface. |
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**The design of the receiver described below is still only in preliminary stage of development** | **The design of the receiver described below is still only in preliminary stage of development** | ||
- | The design should include separate input amplifier (VGA), input band-pass filter to limit the possible intermodulation, | + | The design should include |
- | Analog Frond End ADC with input anti-alias filter and FPGA with PCIe interface for connection to the thunderbolt module. | + | Analog Frond End ADC with input an anti-alias filter and FPGA with a PCIe interface for connection to the thunderbolt module. |
en/sdrx.1374833501.txt.gz · Last modified: 2013/07/26 10:11 (external edit)