en:clkgen
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| + | ====== Digital clock generator CLKGEN01B ====== | ||
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| + | The construction and testing of the module is currently finished. Frequency setting is done through I2C bus usually with the help of PIC18F4550v01A module. The signal output is led out differentially to a SATA connector. | ||
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| + | ====== CLKGEN01A ====== | ||
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| + | The module should be able to generate clock signals with high phase accuracy. The main purpose of this circuit is the generation of clocks for fast ADCs, that are characterized by their high demands for phase noise and signal quality in general. | ||
en/clkgen.txt · Last modified: 2013/07/26 05:24 (external edit)