en:sdrx
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en:sdrx [2013/07/26 10:15] – [UHF SDR SDRX02A receiver] fluktuacia | en:sdrx [2013/07/26 10:16] – [UHF SDR SDRX02A receiver] fluktuacia | ||
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**The design of the receiver described below is still only in a preliminary stage of development** | **The design of the receiver described below is still only in a preliminary stage of development** | ||
- | The design should probably be even more modular. That includes a separate VGA input amplifier, an input band-pass filter, | + | The design should probably be even more modular. That includes a separate VGA input amplifier, an input band-pass filter, |
ACD with a parallel anti-alias filter and FPGA with a parallel USB interface. | ACD with a parallel anti-alias filter and FPGA with a parallel USB interface. | ||
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**The design of the receiver described below is still only in preliminary stage of development** | **The design of the receiver described below is still only in preliminary stage of development** | ||
- | The design should include separate input amplifier (VGA), input band-pass filter to limit the possible intermodulation, | + | The design should include |
- | Analog Frond End ADC with input anti-alias filter and FPGA with PCIe interface for connection to the thunderbolt module. | + | Analog Frond End ADC with input an anti-alias filter and FPGA with a PCIe interface for connection to the thunderbolt module. |
en/sdrx.txt · Last modified: 2013/12/07 11:20 (external edit)